1. Field of the Disclosure
The present disclosure is generally directed to clock management and, and more particularly to clock management at an integrated circuit.
2. Description of the Related Art
A data processing device, such as an integrated circuit microprocessor device, can include a large number of data subsystems fabricated at a single semiconductor die. For example, a microprocessor device can include a memory interface subsystem and a graphics acceleration subsystem in addition to a central processing unit. Each data subsystem can operate as a data processor and can include disparate operating frequency limitations. Therefore, the computational performance of the microprocessor device is typically improved if each data subsystem is configured to operate at a respective frequency that can be different from that of another data subsystem. Furthermore, it can be advantageous if the operating frequency of a particular data subsystem can be changed efficiently while the data subsystem continues to operate. For example, the microprocessor can transition a data subsystem between a typical power operating mode and a low-power operating mode by altering the frequency of a clock signal provided to that data subsystem.